64GB HLDIMM

MHL7F064G24CB11-1W is a 64 GB memory module (HLDIMM) with four independent HyperLink interfaces and is populated with 8 HL7F64G24CB11-1W, 64Gb, multi-chip-package HLNAND flash devices, providing 32 independent banks of flash memory. This module is intended for use in bulk storage memory systems such as Solid State Drives (SSDs). The module PCB is a 200-pin SODIMM as defined by JEDEC 21-C. Devices are populated on the module in four pairs, each pair having a unique set of IO pins on the board edge, and each member of a pair daisy-chained together. Thus, the module has a four-channel architecture which provides the system designer great flexibility in balancing bandwidth, capacity, number of channels, and user-upgradeability of the storage system. It is possible to configure this module with up to 4 independent HyperLink Rings, each operating at 133MHz (266DDR), for a maximum combined bandwidth of 1GByte per second. For example, an SSD that must be small in capacity and achieve a high bandwidth may be designed with one HLDIMM and four separate channels, each achieving 266MB/s for a total bandwidth of 1GB/s. The Ring configuration is determined by the host board layout and may also be designed to be user-upgradeable.

FEATURES

200-pin, small outline dual in-line memory module (SODIMM) - HLDIMM
• Storage Module; 8 HLNAND MCPs (Bridge chip w/ 4-die NAND Stack) on 200-pin HLDIMM PCB
• Fully Compliant HyperLink Interface HL1-266 (DDR 266)
• Four independent input and output channels per module provide up to 1064MB/s data rate
• Each channel populated with pair of daisy-chained devices
• Supports scalable memory capacity
• Module supports up to four independent HLAND rings;
– 1 channel per ring = 4 rings per module
– 2 channels per ring = 2 rings per module
– 4 channels per ring = 1 ring per module
• Daisy-chain cascade up to 127 pairs of devices to increase memory capacity with undiminished data throughput
• 1.8V LVCMOS Compatible IO
• Power Supply
– VCC & VCCQ = 1.8V (Bridge Chip Logic)
– VCC3 = 3.3V (NAND Flash Chips)
• Organization
– Page Size: (4K + 128) Bytes
– Block Size: 128 Pages = (512K + 16K) Bytes
– Bank Size: 4096 Blocks = (2G + 64M) Bytes
– Device Size: 4 Banks = (8G + 256M) Bytes
– Channel Size: 2 Devices = (16G + 512M) Bytes
– Module Size: 4 Channels = (64G + 1024M) Bytes
• Package
– 200-pin SODIMM
• PCB Height
– 30mm (1.18in)

Documents

Product Brief

Datasheet [PDF] login required

Simulation Models

Verilog Model

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